On Tue, Apr 21, 2020 at 1:25 AM Rick Chen wrote:
>
> Hi Atish
>
> > On Mon, Apr 20, 2020 at 1:41 AM Rick Chen wrote:
> > >
> > > Hi Atish
> > >
> > > > From: Atish Patra [mailto:atish.pa...@wdc.com]
> > > > Sent: Sunday, April 19, 2020 3:32 AM
> > > > To: u-boot@lists.denx.de
> > > > Cc: Atish Pa
Hi Atish
> On Mon, Apr 20, 2020 at 1:41 AM Rick Chen wrote:
> >
> > Hi Atish
> >
> > > From: Atish Patra [mailto:atish.pa...@wdc.com]
> > > Sent: Sunday, April 19, 2020 3:32 AM
> > > To: u-boot@lists.denx.de
> > > Cc: Atish Patra; Bin Meng; Anup Patel; Lukas Auer; Heinrich Schuchardt;
> > > ag..
On Mon, Apr 20, 2020 at 1:41 AM Rick Chen wrote:
>
> Hi Atish
>
> > From: Atish Patra [mailto:atish.pa...@wdc.com]
> > Sent: Sunday, April 19, 2020 3:32 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra; Bin Meng; Anup Patel; Lukas Auer; Heinrich Schuchardt;
> > ag...@csgraf.de; ard.biesheu...@
Hi Atish
> From: Atish Patra [mailto:atish.pa...@wdc.com]
> Sent: Sunday, April 19, 2020 3:32 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra; Bin Meng; Anup Patel; Lukas Auer; Heinrich Schuchardt;
> ag...@csgraf.de; ard.biesheu...@linaro.org; Marcus Comstedt; Paul Walmsley;
> Rick Jian-Zhi Chen
On Sun, Apr 19, 2020 at 3:32 AM Atish Patra wrote:
>
> In RISC-V, M-mode software can reserve physical memory regions
> by setting appropriate physical memory protection (PMP) csr. As the
> PMP csr are accessible only in M-mode, S-mode U-Boot can not read
> this configuration directly. However, M-
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