Finally found the issue, It was a ddr configuration issue after all, I
missed one value when copying the settings from our imximage.cfg to the
structures required for 'mx7_dram_cfg(...)'.
Should the register name "offset_lp_con0" in the ddr_phy structure not
be called "lp_con0" as it is ca
Hi all,
I am trying to get SPL working on a imx7 based board. I need to
configure the DDR voltage before u-boot can be loaded from NAND. I am
using the pico-imx7_defconfig as a starting point. It already has SPL
configured to initialize ddr.
From board_init_f I call spl_early_init() to initi
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