Hello Sekhar,
Thank you for the advice below and sorry for the late reply; I have been
offline for a week and I am catching up with my correspondence only now.
El 26/04/2010, a las 13:56, Nori, Sekhar escribió:
[...]
> The only delays being configured in the driver are the
> chip-select hold time
On Sat, Apr 24, 2010 at 03:59:22, Wolfgang Denk wrote:
> Dear Delio Brignoli,
>
> please mind the NetiQuette and restrict your line length to some 70
> charatcers or so. Thanks.
>
> In message <4d573595-069a-4490-af2d-38ed3aad7...@audioscience.com> you wrote:
> >
> > I am working on reducing boot
>> To you knowledge, would enabling the
>> cache for davinci da850 break anything in U-Boot?
>
> No, except that it should be done consistently for all ARM processors.
Which reminds me I have to post V2 of my cache patch. V1 was sent on
2010-01-26 and some flush was missing. I didn't notice as ne
Hello Delio,
On Sat, Apr 24, 2010 at 05:00:49, Delio Brignoli wrote:
> Hello Wolfgang,
>
> On 24/04/2010, at 10:29 AM, Wolfgang Denk wrote:
> > please mind the NetiQuette and restrict your line length to some 70
> > charatcers or so. Thanks.
>
> Will do, thanks.
>
> > Everything is slow as caches
On 24/04/2010, at 11:42 AM, Wolfgang Denk wrote:
> In message you wrote:
>>
>> OK, so reducing the number of reads from registers and writes to RAM
>> should improve performance. To you knowledge, would enabling the
>> cache for davinci da850 break anything in U-Boot?
>
> No, except that it shou
Dear Delio Brignoli,
In message you wrote:
>
> OK, so reducing the number of reads from registers and writes to RAM
> should improve performance. To you knowledge, would enabling the
> cache for davinci da850 break anything in U-Boot?
No, except that it should be done consistently for all ARM p
Hello Wolfgang,
On 24/04/2010, at 10:29 AM, Wolfgang Denk wrote:
> please mind the NetiQuette and restrict your line length to some 70
> charatcers or so. Thanks.
Will do, thanks.
> Everything is slow as caches are not enabled.
OK, so reducing the number of reads from registers and writes to R
Dear Delio Brignoli,
please mind the NetiQuette and restrict your line length to some 70
charatcers or so. Thanks.
In message <4d573595-069a-4490-af2d-38ed3aad7...@audioscience.com> you wrote:
>
> I am working on reducing boot time on an L138 EVM and SPI flash transfer
> speed is currently the
Hello Sekhar,
I am working on reducing boot time on an L138 EVM and SPI flash transfer speed
is currently the worst offender. U-Boot transfers from the SPI flash at
0.6Mbytes/s, this a lot slower than I would expect for a 50MHz SPI clock. Using
a scope we found that the chip select is active th
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