Re: [U-Boot] Performance of the ARM's PL310 L2 cache.

2012-10-01 Thread Lukasz Majewski
Hi Marek, > Dear Tom Rini, > > > On Fri, Aug 17, 2012 at 05:49:53PM +0200, Lukasz Majewski wrote: > > > Hi Aneesh, > > > > > > I've enabled the L2 cache for Trats board. Please find results > > > from performance tests. > > > The test function as well as my way for enabling L2 are attached > > >

Re: [U-Boot] Performance of the ARM's PL310 L2 cache.

2012-09-23 Thread Marek Vasut
Dear Tom Rini, > On Fri, Aug 17, 2012 at 05:49:53PM +0200, Lukasz Majewski wrote: > > Hi Aneesh, > > > > I've enabled the L2 cache for Trats board. Please find results from > > performance tests. > > The test function as well as my way for enabling L2 are attached to > > this e-mail. > > [snip]

Re: [U-Boot] Performance of the ARM's PL310 L2 cache.

2012-08-17 Thread Tom Rini
On Fri, Aug 17, 2012 at 05:49:53PM +0200, Lukasz Majewski wrote: > Hi Aneesh, > > I've enabled the L2 cache for Trats board. Please find results from > performance tests. > The test function as well as my way for enabling L2 are attached to > this e-mail. [snip] > Have you had similar results wi

[U-Boot] Performance of the ARM's PL310 L2 cache.

2012-08-17 Thread Lukasz Majewski
Hi Aneesh, I've enabled the L2 cache for Trats board. Please find results from performance tests. The test function as well as my way for enabling L2 are attached to this e-mail. I simply left the default configuration (number of ways, associativity) as it is at Linux Kernel's driver. Results: