Dear Andreas,
Thanks for your responses.
Based on a little more testing, I found this: with 'nandecc hw',
NAND_HAS_SUBPAGE_READ must be false otherwise data is not written
correct to NAND.
My hardware (a Micron flash chip) supports subpage reads and behaves
correctly with 'nandecc sw'. On boot,
Dear Ash Charles,
On 09/05/2013 01:02 AM, Ash Charles wrote:
> Hi,
>
> I did a little bit more work with git bisect and found an issue on
> commit c788ecfdc3eb577757ffc1bfb8416added07ef33 "nand: Move the
> sub-page read support enable to a flag".
>
> Making this change on top of v2013.07 allowed
Dear Ash Charles,
On 09/04/2013 08:00 PM, Ash Charles wrote:
> On Wed, Sep 4, 2013 at 1:54 AM, Andreas Bießmann
> wrote:
>> I can't confirm your complaints. Here it works (at least on tricorder,
>> which utilizes BCH for U-Boot section in SPL):
> Hi Andreas,
>
> Thanks for your response---this w
Hi,
I did a little bit more work with git bisect and found an issue on
commit c788ecfdc3eb577757ffc1bfb8416added07ef33 "nand: Move the
sub-page read support enable to a flag".
Making this change on top of v2013.07 allowed me to again write to
NAND correctly.
-#define NAND_HAS_SUBPAGE_READ(chip)
On Wed, Sep 4, 2013 at 1:54 AM, Andreas Bießmann
wrote:
> I can't confirm your complaints. Here it works (at least on tricorder,
> which utilizes BCH for U-Boot section in SPL):
Hi Andreas,
Thanks for your response---this was very helpful. When I boot my
board using the tricorder board file, it
Dear Ash Charles,
On 09/04/2013 09:35 AM, Andreas Bießmann wrote:
> Dear Ash Charles,
>
> On 09/03/2013 09:34 PM, Ash Charles wrote:
>> Hi,
>>
>> When using 'nandecc hw' on an OMAP3 platform, data is not being
>> correctly written to NAND. I see the issue on 2013.10-rc2 and 2013.07
>> but not on
Dear Ash Charles,
On 09/03/2013 09:34 PM, Ash Charles wrote:
> Hi,
>
> When using 'nandecc hw' on an OMAP3 platform, data is not being
> correctly written to NAND. I see the issue on 2013.10-rc2 and 2013.07
> but not on 2012.10. Specifically, when I read back a SPL binary
> written with hardwar
Hi,
When using 'nandecc hw' on an OMAP3 platform, data is not being
correctly written to NAND. I see the issue on 2013.10-rc2 and 2013.07
but not on 2012.10. Specifically, when I read back a SPL binary
written with hardware Hamming ECC, I don't get a matching CRC. With
the BCH8 ECC algorithm, t
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