Thanks. I supposed the NAND on the TQM8548 is connected to the CPU as
per Freescale Application Note.
Wolfgang Grandegger wrote:
> Renaud barbier wrote:
>
>> I am in the middle of NAND debugging on a MPC8544 based system.
>>
>
> BTW: also the TQM8548 module uses FSL UPM NAND.
>
> Wolfgan
Renaud barbier wrote:
> I am in the middle of NAND debugging on a MPC8544 based system.
BTW: also the TQM8548 module uses FSL UPM NAND.
Wolfgang.
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Hi,
Renaud barbier wrote:
> I am in the middle of NAND debugging on a MPC8544 based system.
>
> In the following code for the mpc8360erdk, why is there
> the instruction "out_8(upm->io_addr, 0x0);" in the for loop.
it is a dummy write transaction step of the UPM RAM array
programming algorithm
I am in the middle of NAND debugging on a MPC8544 based system.
In the following code for the mpc8360erdk, why is there
the instruction "out_8(upm->io_addr, 0x0);" in the for loop.
Is that board specific?
static void upm_setup(struct fsl_upm *upm)
{
int i;
/* write upm array */
out_
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