Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-06-03 Thread Pavel Machek
Hi! > > > U-Boot 2014.07-rc1-00079-g2072e72-dirty (May 16 2014 - 15:54:55) > > > > > > CPU : Altera SOCFPGA Platform > > > BOARD : Altera SOCFPGA Cyclone5 Board > > > DRAM: 1 GiB > > > WARNING: Caches not enabled > > > Using default environment > > > > > > In:serial > > > Out: serial >

Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-06-01 Thread Chin Liang See
Hi Pavel, On Tue, 2014-05-27 at 14:40 +0200, ZY - pavel wrote: > Hi! > > (Sorry for the delay) > > > > > I know u-boot SPL misses critical parts, but I was told that u-boot > > > > proper should have everything. Only... I was not able to get it to > > > > work. [I'm attempting to load recent u-b

Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-05-27 Thread Pavel Machek
Hi! (Sorry for the delay) > > > I know u-boot SPL misses critical parts, but I was told that u-boot > > > proper should have everything. Only... I was not able to get it to > > > work. [I'm attempting to load recent u-boot from patched/old u-boot; I > > > know this is not exactly recommended, but

Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-05-16 Thread Chin Liang See
Hi, On Thu, 2014-05-15 at 07:01 +1200, Charles Manning wrote: > On Thursday 15 May 2014 04:42:58 Pavel Machek wrote: > > Hi! > > > > > I am trying to understand the state of the socfpga preloader in mainline > > > u-boot. > > > > > > >From what I see, this is broken and perhaps has never worked. >

Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-05-14 Thread Charles Manning
On Thursday 15 May 2014 04:42:58 Pavel Machek wrote: > Hi! > > > I am trying to understand the state of the socfpga preloader in mainline > > u-boot. > > > > >From what I see, this is broken and perhaps has never worked. > > That's correct AFAICT. > > > When I build the code in u-boot-socfpga I get

Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-05-14 Thread Pavel Machek
Hi! > I am trying to understand the state of the socfpga preloader in mainline > u-boot. > > >From what I see, this is broken and perhaps has never worked. That's correct AFAICT. > When I build the code in u-boot-socfpga I get a healthy working > u-boot-spl.bin of approx 45kbytes. > > When I b

Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-05-11 Thread Charles Manning
On Thu, May 8, 2014 at 10:24 PM, Chin Liang See wrote: > Hi Charles, > > > On Tue, 2014-05-06 at 12:22 +1200, Charles Manning wrote: > > Hello > > > > > > I am trying to understand the state of the socfpga preloader in > > mainline u-boot. > > > > > > From what I see, this is broken and perhaps h

Re: [U-Boot] Mainline u-boot SPL for socfpga

2014-05-08 Thread Chin Liang See
Hi Charles, On Tue, 2014-05-06 at 12:22 +1200, Charles Manning wrote: > Hello > > > I am trying to understand the state of the socfpga preloader in > mainline u-boot. > > > From what I see, this is broken and perhaps has never worked. > > > When I build the code in u-boot-socfpga I get a he

[U-Boot] Mainline u-boot SPL for socfpga

2014-05-05 Thread Charles Manning
Hello I am trying to understand the state of the socfpga preloader in mainline u-boot. >From what I see, this is broken and perhaps has never worked. When I build the code in u-boot-socfpga I get a healthy working u-boot-spl.bin of approx 45kbytes. When I build the mainline u-boot code I get a