Hi Paul,
On 14.12.18 22:31, Paul Burton wrote:
On Fri, Dec 14, 2018 at 07:56:59AM +0100, Stefan Roese wrote:
So how to proceed? Should I enable CONFIG_CPU_MIPSR2_IRQ_VI or #define
"cpu_has_veic" to 1 as Lantiq does?
...and on that point in particular, it really depends on your hardware.
You
Hi Paul.
On 14.12.18 22:28, Paul Burton wrote:
On Fri, Dec 14, 2018 at 07:56:59AM +0100, Stefan Roese wrote:
Does this Linux patch help by any chance?
https://git.linux-mips.org/cgit/linux-mti.git/commit/?h=eng-v4.20&id=39e4d339a4540b66e9d9a8ea0da9ee41a21473b4
I'm not sure I remember why I di
On Thu, 13 Dec 2018, Daniel Schwierzeck wrote:
> > I'm not so sure, if overwriting 0x8000 (default value of EBase on
> > this SoC) with the exception handler is allowed. Is this address "zero"
> > handled somewhat specific in MIPS Linux? AFAICT, the complete DDR
> > area on my platform (0x8000
Hi Stefan,
On Fri, Dec 14, 2018 at 07:56:59AM +0100, Stefan Roese wrote:
> So how to proceed? Should I enable CONFIG_CPU_MIPSR2_IRQ_VI or #define
> "cpu_has_veic" to 1 as Lantiq does?
...and on that point in particular, it really depends on your hardware.
You shouldn't need to do either of those
Hi Stefan,
On Fri, Dec 14, 2018 at 07:56:59AM +0100, Stefan Roese wrote:
> > Does this Linux patch help by any chance?
> >
> > https://git.linux-mips.org/cgit/linux-mti.git/commit/?h=eng-v4.20&id=39e4d339a4540b66e9d9a8ea0da9ee41a21473b4
> >
> > I'm not sure I remember why I didn't get that upstr
Hi Paul,
On 13.12.18 20:47, Paul Burton wrote:
On Thu, Dec 13, 2018 at 03:23:39PM +0100, Daniel Schwierzeck wrote:
Finally I found that this line in U-Boot makes Linux break:
arch/mips/lib/traps.c:
void trap_init(ulong reloc_addr)
unsigned long ebase = gd->irq_sp;
...
wri
Hello,
On Thu, Dec 13, 2018 at 03:23:39PM +0100, Daniel Schwierzeck wrote:
> > Finally I found that this line in U-Boot makes Linux break:
> >
> > arch/mips/lib/traps.c:
> >
> > void trap_init(ulong reloc_addr)
> > unsigned long ebase = gd->irq_sp;
> >
Am Do., 13. Dez. 2018 um 14:35 Uhr schrieb Stefan Roese :
>
> On 13.12.18 14:27, Daniel Schwierzeck wrote:
> > Am Do., 13. Dez. 2018 um 11:09 Uhr schrieb Stefan Roese :
> >>
> >> Hi Daniel,
> >>
> >> On 13.12.18 02:00, Daniel Schwierzeck wrote:
> >>> Am 12.12.18 um 09:18 schrieb Stefan Roese:
> >>>
On 13.12.18 14:27, Daniel Schwierzeck wrote:
Am Do., 13. Dez. 2018 um 11:09 Uhr schrieb Stefan Roese :
Hi Daniel,
On 13.12.18 02:00, Daniel Schwierzeck wrote:
Am 12.12.18 um 09:18 schrieb Stefan Roese:
Hi!
I've been hunting for a problem for quite some time, where Linux
hangs / crashes in u
Am Do., 13. Dez. 2018 um 11:09 Uhr schrieb Stefan Roese :
>
> Hi Daniel,
>
> On 13.12.18 02:00, Daniel Schwierzeck wrote:
> > Am 12.12.18 um 09:18 schrieb Stefan Roese:
> >> Hi!
> >>
> >> I've been hunting for a problem for quite some time, where Linux
> >> hangs / crashes in userspace at some poin
Hi Daniel,
On 13.12.18 02:00, Daniel Schwierzeck wrote:
Am 12.12.18 um 09:18 schrieb Stefan Roese:
Hi!
I've been hunting for a problem for quite some time, where Linux
hangs / crashes in userspace at some point on my MT7688 based
systems. I found that this problem can be avoided (worked around
Hi Stefan,
The 12/12/2018 12:41, Stefan Roese wrote:
> Hi Horatiu Vultur,
>
> On 12.12.18 12:21, Horatiu Vultur wrote:
> > Is your Linux Kernel compile with CONFIG_CPU_MIPSR2_IRQ_VI? Because we
> > had similar issue with two of our boards(Ocelot and Luton).
>
> No, its not configured for this MT
Hi Stefan,
Am 12.12.18 um 09:18 schrieb Stefan Roese:
> Hi!
>
> I've been hunting for a problem for quite some time, where Linux
> hangs / crashes in userspace at some point on my MT7688 based
> systems. I found that this problem can be avoided (worked around)
> by not giving Linux the full memor
Hi Horatiu Vultur,
On 12.12.18 12:21, Horatiu Vultur wrote:
Is your Linux Kernel compile with CONFIG_CPU_MIPSR2_IRQ_VI? Because we
had similar issue with two of our boards(Ocelot and Luton).
No, its not configured for this MT7688 / RAMIPS SoC. Enabling this
option does fix this issue. Many tha
Hi Stefan,
Is your Linux Kernel compile with CONFIG_CPU_MIPSR2_IRQ_VI? Because we
had similar issue with two of our boards(Ocelot and Luton).
In our case the problem was that that Linux Kernel didn't reserve memory
for the addresses pointed by ebase register and then later the kernel
used this ad
Hi!
I've been hunting for a problem for quite some time, where Linux
hangs / crashes in userspace at some point on my MT7688 based
systems. I found that this problem can be avoided (worked around)
by not giving Linux the full memory (by using DT memory node fixup
or mem= kernel cmdline). When red
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