Re: [U-Boot] Enabling L2 cache on mx53

2013-08-20 Thread Stefano Babic
Hi Marek, On 19/08/2013 22:31, Marek Vasut wrote: > Dear Fabio Estevam, > >> Hi Marek, >> >> On Mon, Aug 19, 2013 at 4:51 PM, Marek Vasut wrote: >>> L2CC on MX53 is enabled by setting just the L2ON and C bits in CP15, >>> there's no configuration. Not even Linux enables the L2CC on MX53, so if >

Re: [U-Boot] Enabling L2 cache on mx53

2013-08-19 Thread Marek Vasut
Dear Fabio Estevam, > Hi Marek, > > On Mon, Aug 19, 2013 at 4:51 PM, Marek Vasut wrote: > > L2CC on MX53 is enabled by setting just the L2ON and C bits in CP15, > > there's no configuration. Not even Linux enables the L2CC on MX53, so if > > it's not on in U- Boot, then it's not on at all (and t

Re: [U-Boot] Enabling L2 cache on mx53

2013-08-19 Thread Fabio Estevam
Hi Marek, On Mon, Aug 19, 2013 at 4:51 PM, Marek Vasut wrote: > L2CC on MX53 is enabled by setting just the L2ON and C bits in CP15, there's > no > configuration. Not even Linux enables the L2CC on MX53, so if it's not on in > U- > Boot, then it's not on at all (and that sucks). This is what

Re: [U-Boot] Enabling L2 cache on mx53

2013-08-19 Thread Marek Vasut
Dear Fabio Estevam, > Hi Dirk, > > On Mon, Aug 19, 2013 at 12:16 PM, Dirk Behme wrote: > > Is the mx53 L2 cache the same like on mx6? > > I think they are different. > > On mx6 the L2 cache controller is memory mapped ,but on mx53 there is > no L2 cache entry in its memory map. > > Regards, >

Re: [U-Boot] Enabling L2 cache on mx53

2013-08-19 Thread Fabio Estevam
Hi Dirk, On Mon, Aug 19, 2013 at 12:16 PM, Dirk Behme wrote: > Is the mx53 L2 cache the same like on mx6? I think they are different. On mx6 the L2 cache controller is memory mapped ,but on mx53 there is no L2 cache entry in its memory map. Regards, Fabio Estevam

Re: [U-Boot] Enabling L2 cache on mx53

2013-08-19 Thread Dirk Behme
Am 19.08.2013 15:55, schrieb Fabio Estevam: Hi, I notice slow tftp transfer on mx53qsb and I suspected it could be due to L2 cache being disabled. Tried enabling with: --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -45,6 +45,11 @@ #endif

[U-Boot] Enabling L2 cache on mx53

2013-08-19 Thread Fabio Estevam
Hi, I notice slow tftp transfer on mx53qsb and I suspected it could be due to L2 cache being disabled. Tried enabling with: --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -45,6 +45,11 @@ #endif mcr 15, 1, r0, c9, c0, 2 + + /* enable L