On Thu, Mar 04, 2010 at 04:02:31PM +0530, Vipin KUMAR wrote:
> Hi All,
>
> This query is wrt NAND 8/16 bit device support at runtime. Currently,
> the u-boot code can support only one of these at a time.
>
> Although the NAND device in itself can be recognized by reading the
> device id, the NAND
On 3/21/2010 10:20 PM, Wolfgang Denk wrote:
> Dear Vipin KUMAR,
>
> In message <4b908bc8.9030...@st.com> you wrote:
>>
>>> Why would that be needed? Do you really expect to see both types of
>>> interfaces on the same piece of hardware?
>>
>> Yes, that's precisely the case with Spear SoC. It has a
From: Wolfgang Denk
>
> Dear Vipin KUMAR,
>
> In message <4b908bc8.9030...@st.com> you wrote:
> >
> > > Why would that be needed? Do you really expect to see
> > > both types of interfaces on the same piece of hardware?
> >
> > Yes, that's precisely the case with Spear SoC. It has an FSMC
> >
Dear Vipin KUMAR,
In message <4b908bc8.9030...@st.com> you wrote:
>
> > Why would that be needed? Do you really expect to see both types of
> > interfaces on the same piece of hardware?
>
> Yes, that's precisely the case with Spear SoC. It has an FSMC controller
> embedded in it. FSMC can support
On 3/4/2010 5:58 PM, Wolfgang Denk wrote:
> Dear Vipin KUMAR,
>
> In message <4b8f8c3f.6050...@st.com> you wrote:
>>
>> This query is wrt NAND 8/16 bit device support at runtime. Currently,
>> the u-boot code can support only one of these at a time.
>
> Yes, indeed. I have yet to see a piece of h
Dear Vipin KUMAR,
In message <4b8f8c3f.6050...@st.com> you wrote:
>
> This query is wrt NAND 8/16 bit device support at runtime. Currently,
> the u-boot code can support only one of these at a time.
Yes, indeed. I have yet to see a piece of hardware which implements
both 8 and 16 bit interfaces
Hi All,
This query is wrt NAND 8/16 bit device support at runtime. Currently,
the u-boot code can support only one of these at a time.
Although the NAND device in itself can be recognized by reading the
device id, the NAND controllers may need different platform specific
initializations for diffe
7 matches
Mail list logo