Re: [U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support

2014-09-23 Thread Stefan Roese
Hi Chin Liang, On 23.09.2014 12:20, Chin Liang See wrote: Perhaps somebody from Altera with deeper Cadence SPI controller knowledge can take a quick look at this. Could be a pretty obvious mistake that I made while copying / porting the code. Or something else thats simply missing. Any hints ar

Re: [U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support

2014-09-23 Thread Chin Liang See
On Mon, 2014-09-22 at 16:28 +0200, ZY - sr wrote: > Hi SoCFPGA-developers! > > I'm currently using Marek's latest SoCFPGA port. This works really great so > far. > Thank you all for this effort. > > What I need additionally is SPI NOR flash support. So I talked a bit with > Marek > and tried to

[U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support

2014-09-22 Thread Stefan Roese
Hi SoCFPGA-developers! I'm currently using Marek's latest SoCFPGA port. This works really great so far. Thank you all for this effort. What I need additionally is SPI NOR flash support. So I talked a bit with Marek and tried to port the Cadence QSPI driver to mainline U-Boot (on-top of Marek's pa