Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-12 Thread thaoth
Hi, Yoshihiro Shimoda wrote: > > > diff --git a/common/usb.c b/common/usb.c > index 9502f39..1acf51d 100644 > --- a/common/usb.c > +++ b/common/usb.c > @@ -250,7 +250,10 @@ int usb_set_maxpacket(struct usb_device *dev) > > for(i=0; iconfig.bNumInterfaces;i++) { > for(ii=0;

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-12 Thread Yoshihiro Shimoda
Hi, thaoth thaoth wrote: > Can you help me to resolve this bug? I think that it is a problem of the unalignment access. Please change your compiler or change a source code as follows: diff --git a/common/usb.c b/common/usb.c index 9502f39..1acf51d 100644 --- a/common/usb.c +++ b/common/usb.c @@

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-12 Thread thaoth
Hi Yoshihiro Shimoda, * Strategy 1: I add usb_cpu_init following your tutorial: int usb_cpu_init(void) { *STCBR3 = 0x18; *SRSTR = 0x18; cpu_wait_ms(50); *EXCPGCR = 0x21;//0x28; *PECR = 0x1500; cpu_wait_ms(50);

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-11 Thread Yoshihiro Shimoda
Hi, thaoth. thaoth wrote: > > 0x28: 00101000 -> 00 101 000 -> > * 101: Using bus clock > * 000: Dividing Ratio Selection is 1/1 > > I know > * Internal clock: 96Mhz > * Peripheral Clock: 24Mhz > * CPU Block: 144Mhz > > http://www.nabble.com/file/p19449833/a.JPG a.JPG > > Please let me know

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-11 Thread thaoth
Hi, > > Following your instruction, I did > int usb_board_init(void) > { > printf("usb_board_init\n"); > > outw(0x18, STBCR3); > outw(0x18, SRSTR); > udelay(10); > > outw(0x28, EXCPGCR); > udelay(10); > > outw(0x00, STBCR3); > outw(0x00, SRSTR); > ret

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-11 Thread Yoshihiro Shimoda
Hi, thaoth. thaoth wrote: > > > Yoshihiro Shimoda wrote: >> Hi, thaoth. >> >> I think that your board cannot communicate with USB device at all. >> SH7727 has EXCPGCR register. Do you set this register? >> When I used this CPU before, I did the following setting. < snip > >> > Thank you very muc

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-11 Thread thaoth
Yoshihiro Shimoda wrote: > > Hi, thaoth. > > I think that your board cannot communicate with USB device at all. > SH7727 has EXCPGCR register. Do you set this register? > When I used this CPU before, I did the following setting. > > STCBR3 = 0x18; > SRSTR = 0x18; > wait_10ms

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-10 Thread Yoshihiro Shimoda
Hi, thaoth. I think that your board cannot communicate with USB device at all. SH7727 has EXCPGCR register. Do you set this register? When I used this CPU before, I did the following setting. STCBR3 = 0x18; SRSTR = 0x18; wait_10msec(); EXCPGCR = 0x28; wait

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-10 Thread Nobuhiro Iwamatsu
Hi, thaoth. Shimoda-san is USB developper on U-Boot in Renesas. Shimoda-san, please give us comments this problem. Best regards, Nobuhiro On Wed, 10 Sep 2008 04:51:40 -0700 (PDT) thaoth <[EMAIL PROTECTED]> wrote: > > Hi, > > I got USB issue and here is an error message: > > ERROR: CTL:TIM

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-10 Thread thaoth
Hi, I got USB issue and here is an error message: ERROR: CTL:TIMEOUT USB device not responding, giving up (status=20) 3 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found For detail, TEngine/SH7727 has one USB host controller, when I plugged USB Flash Memo

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-09-02 Thread thaoth
Hi Nobuhiro Iwamatsu, Now I'm porting USB on board T-Engine(SH7727) - My configure following : #define CONFIG_CMD_USB #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_USB_STORAGE 1 #define CFG_USB_OHCI_REGS_BASE 0x04000400 #define CFG_USB_OHCI_SLOT_NAME "s3c2400" #define CFG_USB_OHCI_MAX_RO

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-08-21 Thread thaoth
Hi Nobuhiro Iwamatsu, I have checked sequence initialization functions in sh_generic_init and the problem is serial library cannot work correctly. The result is output to console cannot display. Regards. -- View this message in context: http://www.nabble.com/-T-Engine--UBoot-configuration-for

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-08-21 Thread thaoth
Hi Nobuhiro Iwamatsu, > I think that cpu_init is not carried out. > I think that u-boot stopped on lowlevel_init function. thaoth wrote: > > In lowlevel_init function, I put a LED debugging function which turn on > LED on debug board. It works. > > mov.l LED_A, r1 > mov.l LED_

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-08-21 Thread thaoth
Hi Nobuhiro Iwamatsu, > Please set outside clock to CONFIG_SYS_CLK_FREQ. Sorry I didn't see "outside clock" in T-Engine/SH7727 specification. Regard to clock of board, there are 3 types - Internal clock - Peripheral clock - Bus clock And have a look initialization values of T-Monitor - a boot lo

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-08-20 Thread Nobuhiro Iwamatsu
Hi, 2008/8/20 thaoth <[EMAIL PROTECTED]>: > > Hi Nobuhiro Iwamatsu, > > 1. Clock frequency of board. > > #define CONFIG_SYS_CLK_FREQ > #define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */ > #define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDE

Re: [U-Boot] [T-Engine] UBoot configuration for T-Engine/SH7727 MS7727CP02 DevKit

2008-08-19 Thread thaoth
Hi Nobuhiro Iwamatsu, 1. Clock frequency of board. #define CONFIG_SYS_CLK_FREQ #define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */ #define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) I don't understand how to set CONFIG_SYS_CLK_FREQ va