On Sep 28, 2010, at 5:20 PM, York Sun wrote:
> The memory test is performed after DDR initialization when U-boot stills runs
> in flash and cache. On recent mpc85xx platforms, the total memory can be more
> than 2GB. To cover whole memory, it needs be mapped 2GB at a time using a
> sliding TLB wi
The memory test is performed after DDR initialization when U-boot stills runs
in flash and cache. On recent mpc85xx platforms, the total memory can be more
than 2GB. To cover whole memory, it needs be mapped 2GB at a time using a
sliding TLB window. After the testing, DDR is remapped with up to 2GB
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