Re: [U-Boot] [PATCH v7 1/5] core support of arm64

2013-09-12 Thread Tom Rini
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 09/11/2013 10:10 PM, FengHua wrote: > hi, > The following codes are originated from linux kernel. I am not sure > whether license issues exist. > I list the original codes at the bottom. Please check it and give me some > advice. > If lice

Re: [U-Boot] [PATCH v7 1/5] core support of arm64

2013-09-12 Thread Tom Rini
...@ti.com 主题: Re: [U-Boot] [PATCH v7 >> 1/5] core support of arm64 >> >> On 09/10/2013 03:12 AM, feng...@phytium.com.cn wrote: [snip] >>> +++ b/arch/arm/cpu/armv8/cache_v8.c [snip] >>> +#include +#include +#include >>> [snip] >>> +/* + * Stub

Re: [U-Boot] [PATCH v7 1/5] core support of arm64

2013-09-11 Thread FengHua
> -原始邮件- > 发件人: "Scott Wood" > 发送时间: 2013年9月12日 星期四 > 收件人: feng...@phytium.com.cn > 抄送: u-boot@lists.denx.de, tr...@ti.com > 主题: Re: [U-Boot] [PATCH v7 1/5] core support of arm64 > > On Tue, 2013-09-10 at 16:12 +0800, feng...@phytium.com.cn wrot

Re: [U-Boot] [PATCH v7 1/5] core support of arm64

2013-09-11 Thread FengHua
hi, The following codes are originated from linux kernel. I am not sure whether license issues exist. I list the original codes at the bottom. Please check it and give me some advice. If license issues actually exist I would like to remove it. The exception state push action just should

Re: [U-Boot] [PATCH v7 1/5] core support of arm64

2013-09-11 Thread Scott Wood
On Tue, 2013-09-10 at 16:12 +0800, feng...@phytium.com.cn wrote: > +/* > + * Enter Exception. > + * This will save the processor state that is X0~X29/LR/SP/ELR/PSTATE > + * to the stack frame. > + */ > +#define EXCEPTION_ENTRY \ asm macros are nicer. > + sub s