2013/9/14 Albert ARIBAUD :
> Hi Kuo-Jung,
>
> On Mon, 29 Jul 2013 13:51:51 +0800, Kuo-Jung Su
> wrote:
>
>> + * At the time of writting, none of Faraday NAND & SPI controllers
>> + * supports XIP (eXecute In Place). So the Faraday A360/A369 SoC has
>> + * to implement a 1st level bootstrap code st
Hi Kuo-Jung,
On Mon, 29 Jul 2013 13:51:51 +0800, Kuo-Jung Su
wrote:
> + * At the time of writting, none of Faraday NAND & SPI controllers
> + * supports XIP (eXecute In Place). So the Faraday A360/A369 SoC has
> + * to implement a 1st level bootstrap code stored in the embedded ROM
> + * inside
From: Kuo-Jung Su
At the time of writting, none of Faraday NAND & SPI controllers
supports XIP (eXecute In Place), and the 1st stage bootstrap
stored in embedded ROM is not compatible to U-Boot design.
So this patch is added to support booting from Faraday Images.
Signed-off-by: Kuo-Jung Su
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