Re: [U-Boot] [PATCH v6 13/20] clk: sunxi: Add Allwinner H6 CLK driver

On 10/01/2019 18:40, Jagan Teki wrote: > Add initial clock driver for Allwinner H6. > > - Implement UART bus clocks via ccu_clk_gate table for > H6, so it can accessed in common clk enable and disable > functions from clk_sunxi.c > - Implement UART bus resets via ccu_reset table for H6, > so

[U-Boot] [PATCH v6 13/20] clk: sunxi: Add Allwinner H6 CLK driver

Add initial clock driver for Allwinner H6. - Implement UART bus clocks via ccu_clk_gate table for H6, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement UART bus resets via ccu_reset table for H6, so it can accessed in common reset deassert and assert