On 09/05/2014 01:23 AM, Wolfgang Denk wrote:
> Dear Alison Wang,
>
> In message <1409895853-17736-2-git-send-email-alison.w...@freescale.com> you
> wrote:
>>
>> +unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
>> +
>> +sys_info->freq_systembus = sysclk;
>> +#ifdef CONFIG_DDR_CLK_FREQ
>> +
Dear Alison Wang,
In message <1409895853-17736-2-git-send-email-alison.w...@freescale.com> you
wrote:
>
> + unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
> +
> + sys_info->freq_systembus = sysclk;
> +#ifdef CONFIG_DDR_CLK_FREQ
> + sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
> +#else
>
From: Wang Huan
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
From: Wang Huan
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
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