On Thu, Jan 10, 2019 at 6:21 AM André Przywara wrote:
>
> On 08/01/2019 19:12, Jagan Teki wrote:
> > On Tue, Jan 8, 2019 at 5:09 PM Andre Przywara
> > wrote:
> >>
> >> On Tue, 8 Jan 2019 16:27:14 +0530
> >> Jagan Teki wrote:
> >>
> >> Hi,
> >>
> >>> On Mon, Jan 7, 2019 at 6:35 AM André Przywara
On 08/01/2019 19:12, Jagan Teki wrote:
> On Tue, Jan 8, 2019 at 5:09 PM Andre Przywara wrote:
>>
>> On Tue, 8 Jan 2019 16:27:14 +0530
>> Jagan Teki wrote:
>>
>> Hi,
>>
>>> On Mon, Jan 7, 2019 at 6:35 AM André Przywara
>>> wrote:
On 31/12/2018 16:59, Jagan Teki wrote:
> Clock contro
On Tue, Jan 8, 2019 at 5:09 PM Andre Przywara wrote:
>
> On Tue, 8 Jan 2019 16:27:14 +0530
> Jagan Teki wrote:
>
> Hi,
>
> > On Mon, Jan 7, 2019 at 6:35 AM André Przywara
> > wrote:
> > >
> > > On 31/12/2018 16:59, Jagan Teki wrote:
> > > > Clock control unit comprises of parent clocks, gates,
>
On Tue, 8 Jan 2019 16:27:14 +0530
Jagan Teki wrote:
Hi,
> On Mon, Jan 7, 2019 at 6:35 AM André Przywara
> wrote:
> >
> > On 31/12/2018 16:59, Jagan Teki wrote:
> > > Clock control unit comprises of parent clocks, gates,
> > > multiplexers, dividers, multipliers, pre/post dividers and flags
>
On Mon, Jan 7, 2019 at 6:35 AM André Przywara wrote:
>
> On 31/12/2018 16:59, Jagan Teki wrote:
> > Clock control unit comprises of parent clocks, gates, multiplexers,
> > dividers, multipliers, pre/post dividers and flags etc.
> >
> > So, the U-Boot implementation of ccu has divided into gates an
On Mon, Jan 7, 2019 at 6:35 AM André Przywara wrote:
>
> On 31/12/2018 16:59, Jagan Teki wrote:
> > Clock control unit comprises of parent clocks, gates, multiplexers,
> > dividers, multipliers, pre/post dividers and flags etc.
> >
> > So, the U-Boot implementation of ccu has divided into gates an
On Mon, Jan 07, 2019 at 02:09:12PM +, Andre Przywara wrote:
> > > What is MISC, exactly? Seems like an artefact clock to me, some
> > > placeholder you need because gate clocks are handled separately in
> > > the gates struct. Should this be called something with SIMPLE
> > > instead, or GATE?
On Mon, 7 Jan 2019 14:01:01 +0100
Maxime Ripard wrote:
Hi,
> On Mon, Jan 07, 2019 at 01:03:33AM +, André Przywara wrote:
> > On 31/12/2018 16:59, Jagan Teki wrote:
> > > Clock control unit comprises of parent clocks, gates,
> > > multiplexers, dividers, multipliers, pre/post dividers and f
On Mon, Jan 07, 2019 at 01:03:33AM +, André Przywara wrote:
> On 31/12/2018 16:59, Jagan Teki wrote:
> > Clock control unit comprises of parent clocks, gates, multiplexers,
> > dividers, multipliers, pre/post dividers and flags etc.
> >
> > So, the U-Boot implementation of ccu has divided into
On 31/12/2018 16:59, Jagan Teki wrote:
> Clock control unit comprises of parent clocks, gates, multiplexers,
> dividers, multipliers, pre/post dividers and flags etc.
>
> So, the U-Boot implementation of ccu has divided into gates and tree.
> gates are generic clock configuration of enable/disable
Clock control unit comprises of parent clocks, gates, multiplexers,
dividers, multipliers, pre/post dividers and flags etc.
So, the U-Boot implementation of ccu has divided into gates and tree.
gates are generic clock configuration of enable/disable bit management
which can be handle via ccu_clock
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