Re: [U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-06-09 Thread Albert ARIBAUD
Hi Marc, On Sat, 26 Apr 2014 13:17:07 +0100, Marc Zyngier wrote: > The current non-sec switching code suffers from one major issue: > it cannot run in secure RAM, as a large part of u-boot still needs > to be run while we're switched to non-secure. > > This patch reworks the whole HYP/non-secur

Re: [U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-05-07 Thread Jon Loeliger
>> /* >> * With the Secure Monitor at 0x0, its reset vector must also >> * then point off to the correct "out-of-reset entry function." >> */ >> #define CONFIG_SECURE_MONITOR_RESET_FUNCTION_myplatform_cpu_entry >> #define CONFIG_ARMV7_SECURE_BASE0x0 >> >> That _myplatform_cpu_entry corre

Re: [U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-05-07 Thread Jon Loeliger
On Wed, May 7, 2014 at 2:05 AM, Marc Zyngier wrote: > On Fri, May 02 2014 at 10:03:37 pm BST, Jon Loeliger > wrote: >> Mark, >> >> In your nonsec_init code, you suggest this change: >> >> + mrc p15, 0, r0, c1, c1, 2 >> movwr1, #0x3fff >> - movtr1, #0x0006 >> -

Re: [U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-05-07 Thread Marc Zyngier
On Fri, May 02 2014 at 10:03:37 pm BST, Jon Loeliger wrote: > Mark, > > In your nonsec_init code, you suggest this change: > > + mrc p15, 0, r0, c1, c1, 2 > movwr1, #0x3fff > - movtr1, #0x0006 > - mcr p15, 0, r1, c1, c1, 2 @ NSACR = all copros to

Re: [U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-05-06 Thread Marc Zyngier
On Fri, May 02 2014 at 9:30:05 pm BST, Jon Loeliger wrote: Hi Jon, > I finally have all this working for me on an A9 system too! Awesome! Ship it! ;-) > However, there were a few things that I had to change a bit. > For example, by CPUs will always come out of reset at 0x0 > and I do not have

Re: [U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-05-02 Thread Jon Loeliger
Mark, In your nonsec_init code, you suggest this change: + mrc p15, 0, r0, c1, c1, 2 movwr1, #0x3fff - movtr1, #0x0006 - mcr p15, 0, r1, c1, c1, 2 @ NSACR = all copros to non-sec + movtr1, #0x0004 + orr r0, r0, r1 + mcr

Re: [U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-05-02 Thread Jon Loeliger
Mark, I finally have all this working for me on an A9 system too! However, there were a few things that I had to change a bit. For example, by CPUs will always come out of reset at 0x0 and I do not have the ability to set their first-fetch address to anything else. To accommodate this, I need to

[U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM

2014-04-26 Thread Marc Zyngier
The current non-sec switching code suffers from one major issue: it cannot run in secure RAM, as a large part of u-boot still needs to be run while we're switched to non-secure. This patch reworks the whole HYP/non-secure strategy by: - making sure the secure code is the *last* thing u-boot execut