Re: [U-Boot] [PATCH v3 4/7] MSCC: add support for Luton SoCs

2018-12-13 Thread Gregory CLEMENT
Hi Daniel, On lun., déc. 10 2018, Daniel Schwierzeck wrote: >> +static inline int hal_vcoreiii_train_bytelane(u32 bytelane) >> +{ >> +register int res; >> + >> +set_dly(bytelane, 0); // Start training at DQS=0 > > no C++ style comments > OK [...] >> +for (i = 0; i < 8; i++) { >> +

Re: [U-Boot] [PATCH v3 4/7] MSCC: add support for Luton SoCs

2018-12-10 Thread Daniel Schwierzeck
Am 05.12.18 um 18:10 schrieb Gregory CLEMENT: > As the Ocelots SoCs, this family of SoCs are found in the Microsemi > Switches solution. > > Signed-off-by: Gregory CLEMENT > --- > arch/mips/mach-mscc/Kconfig | 13 + > arch/mips/mach-mscc/Makefile | 1 + >

[U-Boot] [PATCH v3 4/7] MSCC: add support for Luton SoCs

2018-12-05 Thread Gregory CLEMENT
As the Ocelots SoCs, this family of SoCs are found in the Microsemi Switches solution. Signed-off-by: Gregory CLEMENT --- arch/mips/mach-mscc/Kconfig | 13 + arch/mips/mach-mscc/Makefile | 1 + arch/mips/mach-mscc/cpu.c | 14 +- arch/mip