Hi Vlad,
On Tue, 2017-03-21 at 14:49 +0300, Vlad Zakharov wrote:
> ARC cores may have up to 2 built-in timers: timer0 and timer1,
> usually at least one of them exists. They both are driven by the
> same core clock.
>
> They are controlled through auxiliary registers and so we
> don't have to rem
ARC cores may have up to 2 built-in timers: timer0 and timer1,
usually at least one of them exists. They both are driven by the
same core clock.
They are controlled through auxiliary registers and so we
don't have to remap their control registers as we used to do
with MMIO registers of external pe
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