On Tue, Dec 02, 2008 at 11:48:51AM +0800, Dave Liu wrote:
> we load the secondary stage u-boot image from NAND to
> system memory by nand_load, but we did not flush d-cache
> to memory, not invalidate i-cache before we jump to RAM.
> when the system is cache enable and the TLB/page attribute
> of s
On Tuesday 02 December 2008, Dave Liu wrote:
> we load the secondary stage u-boot image from NAND to
> system memory by nand_load, but we did not flush d-cache
> to memory, not invalidate i-cache before we jump to RAM.
> when the system is cache enable and the TLB/page attribute
> of system memory
we load the secondary stage u-boot image from NAND to
system memory by nand_load, but we did not flush d-cache
to memory, not invalidate i-cache before we jump to RAM.
when the system is cache enable and the TLB/page attribute
of system memory is cacheable, it will cause issue.
- 83xx family is us
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