Re: [U-Boot] [PATCH v3] mmc: omap: timeout counter fix

2010-11-19 Thread Paulraj, Sandeep
> > Having a loop with a counter is no timing guarentee for timing > accuracy or compiler optimizations. For e.g. the same loop counter > which runs when the MPU is running at 600MHz will timeout in around > half the time when running at 1GHz. or the example where GCC 4.5 > compiles with differe

Re: [U-Boot] [PATCH v3] mmc: omap: timeout counter fix

2010-11-04 Thread Steve Sakoman
On Tue, Oct 26, 2010 at 11:04 AM, Nishanth Menon wrote: > Having a loop with a counter is no timing guarentee for timing > accuracy or compiler optimizations. For e.g. the same loop counter > which runs when the MPU is running at 600MHz will timeout in around > half the time when running at 1GHz.

Re: [U-Boot] [PATCH v3] mmc: omap: timeout counter fix

2010-11-04 Thread Menon, Nishanth
On Tue, Oct 26, 2010 at 14:04, Menon, Nishanth wrote: > > Having a loop with a counter is no timing guarentee for timing > accuracy or compiler optimizations. For e.g. the same loop counter > which runs when the MPU is running at 600MHz will timeout in around > half the time when running at 1GHz.

[U-Boot] [PATCH v3] mmc: omap: timeout counter fix

2010-10-26 Thread Nishanth Menon
Having a loop with a counter is no timing guarentee for timing accuracy or compiler optimizations. For e.g. the same loop counter which runs when the MPU is running at 600MHz will timeout in around half the time when running at 1GHz. or the example where GCC 4.5 compiles with different optimization