Hi Andy
2011/11/29 Andy Fleming
> >> >
> >> >clear |= FTSDC010_STATUS_DATA_TIMEOUT;
> >>
> >> Why set clear? This code returns before clear is written.
> >> >writel(sta, &host->reg->clr);
> >> > +
> >> >return TIMEOUT;
> >
On Mon, Nov 28, 2011 at 2:07 AM, Macpaul Lin wrote:
>> However, aside from that, the interrupt clearing confuses me. Usually,
>> you read the event register, and then write it back to clear
>> it. If there is more than one error, some of the status bits will be
>> left uncleared. If you only want
Hi Andy,
> Changes for v2:
> > - Fix the problem if we read status register too fast in
> FTSDC010_CMD_RETRY
> >loop. If we read status register here too fast, the hardware will
> report
> >RSP_TIMEOUT incorrectly.
> > Changes for v3:
> > - Remove host high speed capability due to hardwa
On Thu, Nov 17, 2011 at 3:34 AM, Macpaul Lin wrote:
> This patch improve the performance by spliting flag examination code
> in ftsdc010_send_cmd() into 3 functions.
> This patch also reordered the function which made better capability to
> some high performance cards against to the next version o
This patch improve the performance by spliting flag examination code
in ftsdc010_send_cmd() into 3 functions.
This patch also reordered the function which made better capability to
some high performance cards against to the next version of ftsdc010
hardware.
Signed-off-by: Macpaul Lin
---
Changes
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