On Rab, 2017-07-12 at 12:57 +0200, Marek Vasut wrote:
> On 07/03/2017 11:07 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Enable FPGA driver build for SPL because FPGA driver is needed for
> > SPL
> > to configure and getting DDR up before loading U-boot into DDR and
>
On 07/03/2017 11:07 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Enable FPGA driver build for SPL because FPGA driver is needed for SPL
> to configure and getting DDR up before loading U-boot into DDR and
> booting from there.
It is only needed for that on Arria 10 , not elsewh
From: Tien Fong Chee
Enable FPGA driver build for SPL because FPGA driver is needed for SPL
to configure and getting DDR up before loading U-boot into DDR and
booting from there.
Signed-off-by: Tien Fong Chee
Reviewed-by: Ley Foon Tan
Reviewed-by: Dinh Nguyen
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drivers/Makefile | 1 +
1 fi
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