Dear Tom Warren,
In message <1295651217-32421-2-git-send-email-twar...@nvidia.com> you wrote:
> Signed-off-by: Tom Warren
>...
...
> +/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
> +typedef volatile struct clk_rst_ctlr {
...
> +/* APB MISC Pin Mux and Tristate (APB_MISC_PP_) registers
Signed-off-by: Tom Warren
---
Changes for V2:
- Coding style cleanup
- Move serial driver changes to separate patch
- Use board/nvidia instead of board/tegra
- Remove TRUE/FALSE defines
- Use standard NS16550 registers/bit defines in UART init
Changes for V
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