Re: [U-Boot] [PATCH 6/8] sf: add new option to support SPI flash above 16MiB

2017-05-21 Thread Yang, Wenyou
On 2017/5/19 22:59, Cyrille Pitchen wrote: The patch provides an alternative method to support SPI flash size greater than 16MiB (128Mib). Indeed using the Base Address Register (BAR) is stateful. Hence, once the BAR has been modified, if a spurious CPU reset occurs with no reset/power off at

[U-Boot] [PATCH 6/8] sf: add new option to support SPI flash above 16MiB

2017-05-19 Thread Cyrille Pitchen
The patch provides an alternative method to support SPI flash size greater than 16MiB (128Mib). Indeed using the Base Address Register (BAR) is stateful. Hence, once the BAR has been modified, if a spurious CPU reset occurs with no reset/power off at the SPI flash side, early boot loarders may try