Re: [U-Boot] [PATCH 4/9] sunxi: introduce RMR switch to enter payloads in 64-bit mode

Andre, > On 21.02.2019, at 14:06, Alexander Graf wrote: > > On 02/21/2019 01:07 PM, Andre Przywara wrote: >> On Thu, 21 Feb 2019 12:52:50 +0100 >> Alexander Graf wrote: >> >>> On 02/21/2019 02:30 AM, Andre Przywara wrote: The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 m

Re: [U-Boot] [PATCH 4/9] sunxi: introduce RMR switch to enter payloads in 64-bit mode

On 02/21/2019 01:07 PM, Andre Przywara wrote: On Thu, 21 Feb 2019 12:52:50 +0100 Alexander Graf wrote: On 02/21/2019 02:30 AM, Andre Przywara wrote: The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode. To run AArch64 code, we have to trigger a warm reset via the RMR registe

Re: [U-Boot] [PATCH 4/9] sunxi: introduce RMR switch to enter payloads in 64-bit mode

On Thu, 21 Feb 2019 12:52:50 +0100 Alexander Graf wrote: > On 02/21/2019 02:30 AM, Andre Przywara wrote: > > The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode. > > To run AArch64 code, we have to trigger a warm reset via the RMR register, > > which proceeds with code executio

Re: [U-Boot] [PATCH 4/9] sunxi: introduce RMR switch to enter payloads in 64-bit mode

On 02/21/2019 02:30 AM, Andre Przywara wrote: The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode. To run AArch64 code, we have to trigger a warm reset via the RMR register, which proceeds with code execution at the address stored in the RVBAR register. If the bootable payload

[U-Boot] [PATCH 4/9] sunxi: introduce RMR switch to enter payloads in 64-bit mode

The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode. To run AArch64 code, we have to trigger a warm reset via the RMR register, which proceeds with code execution at the address stored in the RVBAR register. If the bootable payload in the FIT image is using a different architectu