Re: [U-Boot] [PATCH 4/7] mmc: uniphier-sd: Handle Renesas div-by-1

2018-01-25 Thread Masahiro Yamada
2018-01-17 2:17 GMT+09:00 Marek Vasut : > On the Renesas version of the IP, the /1 divider is realized by > setting the clock register [7:0] to 0xff instead of setting bit > 10 of the register. Check the quirk and handle accordingly. > > Signed-off-by: Marek Vasut > Cc: Jaehoon Chung > Cc: Masahi

[U-Boot] [PATCH 4/7] mmc: uniphier-sd: Handle Renesas div-by-1

2018-01-16 Thread Marek Vasut
On the Renesas version of the IP, the /1 divider is realized by setting the clock register [7:0] to 0xff instead of setting bit 10 of the register. Check the quirk and handle accordingly. Signed-off-by: Marek Vasut Cc: Jaehoon Chung Cc: Masahiro Yamada --- drivers/mmc/uniphier-sd.c | 4 +++- 1

[U-Boot] [PATCH 4/7] mmc: uniphier-sd: Handle Renesas div-by-1

2018-01-06 Thread Marek Vasut
On the Renesas version of the IP, the /1 divider is realized by setting the clock register [7:0] to 0xff instead of setting bit 10 of the register. Check the quirk and handle accordingly. Signed-off-by: Marek Vasut Cc: Jaehoon Chung Cc: Masahiro Yamada --- drivers/mmc/uniphier-sd.c | 4 +++- 1