Dear York Sun,
In message <1282944356-4020-3-git-send-email-york...@freescale.com> you wrote:
> If enabled in config file and hwconfig, the memory test is performed
POST memory testing is not controlled through hwconfig, but through
it's own set of environment variable settings. Please don't mix
If enabled in config file and hwconfig, the memory test is performed
after DDR initialization when U-boot stills runs in flash and cache.
Whole memory is testable. It is mapped 2GB at a time using a sliding
TLB window. After the testing, DDR is remapped with up to 2GB memory
from the lowest address
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