Re: [U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit

2015-07-28 Thread Simon Glass
Hi Stephen, On 28 July 2015 at 10:05, Stephen Warren wrote: > On 07/28/2015 09:50 AM, Simon Glass wrote: >> >> Hi Stephen, >> >> On 28 July 2015 at 09:44, Stephen Warren wrote: >>> >>> On 07/28/2015 09:33 AM, Simon Glass wrote: Hi, On 27 July 2015 at 11:45, Stephen Warre

Re: [U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit

2015-07-28 Thread Stephen Warren
On 07/28/2015 09:50 AM, Simon Glass wrote: Hi Stephen, On 28 July 2015 at 09:44, Stephen Warren wrote: On 07/28/2015 09:33 AM, Simon Glass wrote: Hi, On 27 July 2015 at 11:45, Stephen Warren wrote: From: Thierry Reding For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU

Re: [U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit

2015-07-28 Thread Simon Glass
Hi Stephen, On 28 July 2015 at 09:44, Stephen Warren wrote: > On 07/28/2015 09:33 AM, Simon Glass wrote: >> >> Hi, >> >> On 27 July 2015 at 11:45, Stephen Warren wrote: >>> >>> From: Thierry Reding >>> >>> For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in >>> AArch64 mode so

Re: [U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit

2015-07-28 Thread Stephen Warren
On 07/28/2015 09:33 AM, Simon Glass wrote: Hi, On 27 July 2015 at 11:45, Stephen Warren wrote: From: Thierry Reding For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in AArch64 mode so that we don't need the SPL. Non-cached memory is not implemented (yet) for 64-bit ARM. Si

Re: [U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit

2015-07-28 Thread Simon Glass
Hi, On 27 July 2015 at 11:45, Stephen Warren wrote: > From: Thierry Reding > > For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in > AArch64 mode so that we don't need the SPL. Non-cached memory is not > implemented (yet) for 64-bit ARM. > > Signed-off-by: Thierry Reding > Sig

[U-Boot] [PATCH 3/3] ARM: tegra: Disable SPL and non-cached memory on 64-bit

2015-07-27 Thread Stephen Warren
From: Thierry Reding For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in AArch64 mode so that we don't need the SPL. Non-cached memory is not implemented (yet) for 64-bit ARM. Signed-off-by: Thierry Reding Signed-off-by: Tom Warren Signed-off-by: Stephen Warren --- include/