Hi Vladimir,
On Sun, Jul 5, 2015 at 11:22 PM, Vladimir Zapolskiy wrote:
> LPC32xx MAC and clock control configuration requires some minor quirks
> to deal with a phy connected by RMII.
>
> It's worth to mention that the kernel and legacy BSP from NXP sets
> SUPP_RESET_RMII == (1 << 11) bit, howev
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Vladimir
> Zapolskiy
> Sent: 6-Jul-15 12:22 AM
>
> LPC32xx MAC and clock control configuration requires some minor quirks
> to deal with a phy connected by RMII.
>
> It's worth to mention that the kernel and legacy BSP from NXP sets
.org/patch/491419/
Tested-by: Sylvain Lemieux
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Vladimir
Zapolskiy
Sent: 6-Jul-15 12:22 AM
To: Albert ARIBAUD; Joe Hershberger
Cc: Tom Rini; u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] net: lpc32xx:
: [U-Boot] [PATCH 2/2] net: lpc32xx: add RMII phy mode support
Hi Sylvain,
On 06.07.2015 21:50, LEMIEUX, SYLVAIN wrote:
> Hi Vladimir,
>
> I tested the patch and it is working.
>
> However, in the legacy BSP from NXP, a 10ms delay was present after the soft
> reset release (to l
Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Vladimir
> Zapolskiy
> Sent: 6-Jul-15 12:22 AM
> To: Albert ARIBAUD; Joe Hershberger
> Cc: Tom Rini; u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH 2/2] net: lpc32xx: add RMII phy mode support
>
Lemieux
Tyco
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Vladimir
Zapolskiy
Sent: 6-Jul-15 12:22 AM
To: Albert ARIBAUD; Joe Hershberger
Cc: Tom Rini; u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] net: lpc32xx: add RMII phy mode support
LPC32xx MAC
LPC32xx MAC and clock control configuration requires some minor quirks
to deal with a phy connected by RMII.
It's worth to mention that the kernel and legacy BSP from NXP sets
SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is
missing in shared LPC32x0 User Manual UM10326 Rev
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