Re: [U-Boot] [PATCH 1/6] OMAP3: Fix SDRC init

2009-09-23 Thread Wolfgang Denk
Dear Nishanth Menon, In message <1253326918-1670-2-git-send-email...@ti.com> you wrote: > Defaults are for infenion DDR timings. Typo: Infineon. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-821

[U-Boot] [PATCH 1/6] OMAP3: Fix SDRC init

2009-09-18 Thread Nishanth Menon
Defaults are for infenion DDR timings. Since none of the supported boards currently do XIP boot, these seem to be faulty. fix the values as per the calculations(ACTIMA,B), conf the sdrc power with pwdnen and wakeupproc bits Signed-off-by: Nishanth Menon --- cpu/arm_cortexa8/omap3/mem.c |