Re: [U-Boot] [PATCH 07/10] x86: Implement a cache for Memory Reference Code parameters

2015-01-05 Thread Simon Glass
Hi Bin, On 5 January 2015 at 06:54, Bin Meng wrote: > Hi Simon, > > On Mon, Jan 5, 2015 at 9:49 AM, Simon Glass wrote: >> Hi Bin, >> >> On 4 January 2015 at 00:49, Bin Meng wrote: >>> Hi Simon, >>> >>> On Tue, Dec 30, 2014 at 9:12 AM, Simon Glass wrote: The memory reference code takes a v

Re: [U-Boot] [PATCH 07/10] x86: Implement a cache for Memory Reference Code parameters

2015-01-05 Thread Bin Meng
Hi Simon, On Mon, Jan 5, 2015 at 9:49 AM, Simon Glass wrote: > Hi Bin, > > On 4 January 2015 at 00:49, Bin Meng wrote: >> Hi Simon, >> >> On Tue, Dec 30, 2014 at 9:12 AM, Simon Glass wrote: >>> The memory reference code takes a very long time to 'train' its SDRAM >>> interface, around half a se

Re: [U-Boot] [PATCH 07/10] x86: Implement a cache for Memory Reference Code parameters

2015-01-04 Thread Simon Glass
Hi Bin, On 4 January 2015 at 00:49, Bin Meng wrote: > Hi Simon, > > On Tue, Dec 30, 2014 at 9:12 AM, Simon Glass wrote: >> The memory reference code takes a very long time to 'train' its SDRAM >> interface, around half a second. To avoid this delay on every boot we can >> store the parameters fr

Re: [U-Boot] [PATCH 07/10] x86: Implement a cache for Memory Reference Code parameters

2015-01-03 Thread Bin Meng
Hi Simon, On Tue, Dec 30, 2014 at 9:12 AM, Simon Glass wrote: > The memory reference code takes a very long time to 'train' its SDRAM > interface, around half a second. To avoid this delay on every boot we can > store the parameters from the last training sessions to speed up the next. > > Add an

[U-Boot] [PATCH 07/10] x86: Implement a cache for Memory Reference Code parameters

2014-12-29 Thread Simon Glass
The memory reference code takes a very long time to 'train' its SDRAM interface, around half a second. To avoid this delay on every boot we can store the parameters from the last training sessions to speed up the next. Add an implementation of this, storing the training data in CMOS RAM and SPI fl