On Sat, Oct 29, 2016 at 6:39 PM, Hans de Goede wrote:
> Hi,
>
> On 28-10-16 20:54, Jagan Teki wrote:
>>
>> On Fri, Oct 28, 2016 at 3:51 PM, Chen-Yu Tsai wrote:
>>>
>>> From: Philipp Tomsich
>>>
>>> This adds DRAM initialisation code for sun9i, which calculates the
>>> appropriate timings based o
Hi,
On 28-10-16 20:54, Jagan Teki wrote:
On Fri, Oct 28, 2016 at 3:51 PM, Chen-Yu Tsai wrote:
From: Philipp Tomsich
This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.
With th
On Fri, Oct 28, 2016 at 3:51 PM, Chen-Yu Tsai wrote:
> From: Philipp Tomsich
>
> This adds DRAM initialisation code for sun9i, which calculates the
> appropriate timings based on timing information for the supplied
> DDR3 bin and the clock speeds used.
>
> With this DRAM setup, we have verified D
From: Philipp Tomsich
This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.
With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
(i.e. DDR3-1600) on the A80-Q7 using a
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