On 03/01/2017 07:37 PM, Ruchika Gupta wrote:
Fir E6500 cores, L2 cache has been used as init_ram. L1 cache is a write
through cache on E6500.If lines are not locked in both L1 and L2 caches,
crashes are observed during secure boot. This patch locks/unlocks both L1
as well as L2 cache to prevent t
> -Original Message-
> From: york sun
> Sent: Saturday, March 25, 2017 10:16 PM
> To: Ruchika Gupta ; u-boot@lists.denx.de;
> prabhakar.khushw...@nxp.com
> Subject: Re: [U-Boot] [PATCH] powerpc: e6500: Lock/unlock 1 cache instead
> of L1 as init_ram
>
> On 0
On 03/01/2017 07:37 PM, Ruchika Gupta wrote:
> Fir E6500 cores, L2 cache has been used as init_ram. L1 cache is a write
> through cache on E6500.If lines are not locked in both L1 and L2 caches,
> crashes are observed during secure boot. This patch locks/unlocks both L1
> as well as L2 cache to pre
Fir E6500 cores, L2 cache has been used as init_ram. L1 cache is a write
through cache on E6500.If lines are not locked in both L1 and L2 caches,
crashes are observed during secure boot. This patch locks/unlocks both L1
as well as L2 cache to prevent the crash.
Signed-off-by: Ruchika Gupta
---
a
Fir E6500 cores, L2 cache has been used as init_ram. L1 cache is a write
through cache on E6500.If lines are not locked in both L1 and L2 caches,
crashes are observed during secure boot. This patch locks/unlocks both L1
as well as L2 cache to prevent the crash.
Signed-off-by: Ruchika Gupta
---
a
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