2018-07-19 10:13 GMT+09:00 Masahiro Yamada :
> The NAND framework makes sure to pass in the buffer with at least
> chip->buf_align alignment. Currently, the Denali NAND driver only
> requests 16 byte alignment. This causes unaligned cache operations
> for the DMA transfer.
>
> [Error Example]
>
>
The NAND framework makes sure to pass in the buffer with at least
chip->buf_align alignment. Currently, the Denali NAND driver only
requests 16 byte alignment. This causes unaligned cache operations
for the DMA transfer.
[Error Example]
=> nand read 8110 0 1000
NAND read: device 0 offset 0
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