Hi Pantelis,
> -Original Message-
> From: Pantelis Antoniou [mailto:pa...@antoniou-consulting.com]
> Sent: 2015年9月21日 23:36
> To: Yang, Wenyou
> Cc: U-Boot Mailing List
> Subject: Re: [PATCH] mmc: sdhci: Fix the SD clock stop sequence
>
> Hi Wenyou,
>
> > On Sep 16, 2015, at 11:22 , Weny
Hi Wenyou,
> On Sep 16, 2015, at 11:22 , Wenyou Yang wrote:
>
> According to the SDHC specification, stopping the SD Clock is by setting
> the SD Clock Enable bit in the Clock Control register at 0, instead of
> setting all bits at 0.
>
> Before stopping the SD clock, we need to make sure all S
According to the SDHC specification, stopping the SD Clock is by setting
the SD Clock Enable bit in the Clock Control register at 0, instead of
setting all bits at 0.
Before stopping the SD clock, we need to make sure all SD transactions
to complete, so add checking the CMD and DAT bits in the Pre
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