On Mon, Mar 19, 2012 at 03:50:53PM +0200, Grazvydas Ignotas wrote:
> According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC
> power supply is being enabled and is ramping up (those bits might be
> left set by the previous bootloader). It doesn't say what happens if
> this procedure
On Mon, Mar 19, 2012 at 6:44 PM, Tom Rini wrote:
> On 03/19/2012 06:50 AM, Grazvydas Ignotas wrote:
>>
>> According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC
>> power supply is being enabled and is ramping up (those bits might be
>> left set by the previous bootloader). It doesn
On 03/19/2012 06:50 AM, Grazvydas Ignotas wrote:
According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC
power supply is being enabled and is ramping up (those bits might be
left set by the previous bootloader). It doesn't say what happens if
this procedure is violated, but better
According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC
power supply is being enabled and is ramping up (those bits might be
left set by the previous bootloader). It doesn't say what happens if
this procedure is violated, but better not to risk here and do things
as required.
Signed
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