Re: [U-Boot] [PATCH] driver/ddr/fsl: Fix timing_cfg_2

On 07/29/2016 09:02 AM, York Sun wrote: > Commit 5605dc6 tried to fix wr_lat bit in timing_cfg_2, but the > change was wrong. wr_lat has 5 bits with MSB at [13] and lower > 4 bits at [9:12], in big-endian convention. > > Signed-off-by: York Sun > Reported-by: Thomas Schaefer > --- > > drivers/dd

[U-Boot] [PATCH] driver/ddr/fsl: Fix timing_cfg_2

Commit 5605dc6 tried to fix wr_lat bit in timing_cfg_2, but the change was wrong. wr_lat has 5 bits with MSB at [13] and lower 4 bits at [9:12], in big-endian convention. Signed-off-by: York Sun Reported-by: Thomas Schaefer --- drivers/ddr/fsl/ctrl_regs.c | 2 +- 1 file changed, 1 insertion(+)