On Wed, 27 Mar 2019 at 17:50, Trent Piepho wrote:
>
> The cache flush of the kernel load area needs to be aligned outward to
> the DMA cache alignment. The operations are simpler if we think of this
> as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and
> aligning the end up, ALIG
The cache flush of the kernel load area needs to be aligned outward to
the DMA cache alignment. The operations are simpler if we think of this
as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and
aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find
the length of t
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