Re: [U-Boot] [PATCH] arm: vf610: add DDR_SEL_PAD_CONTR register

2014-05-25 Thread Albert ARIBAUD
Hi ste...@agner.ch, On Wed, 23 Apr 2014 18:17:51 +0200, ste...@agner.ch wrote: > From: Stefan Agner > > Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM > issues with newer silicon (1.1). This register was added in revision > 4 of the Vybrid Reference Manual. > > Signed-off-b

[U-Boot] [PATCH] arm: vf610: add DDR_SEL_PAD_CONTR register

2014-04-23 Thread stefan
From: Stefan Agner Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM issues with newer silicon (1.1). This register was added in revision 4 of the Vybrid Reference Manual. Signed-off-by: Stefan Agner --- arch/arm/include/asm/arch-vf610/imx-regs.h | 1 + board/freescale/vf610tw