Le 06/11/2011 20:29, Simon Glass a écrit :
> It's actually a lot more than cache ops. SOCs have there own clock
> stuff, pinmux things, power mgmt, timers and the like. While it might
> be desirable to provide this feature it is a fair bit of work and we
> need to be careful not to make things mor
Le 06/11/2011 02:16, Marek Vasut a écrit :
> This patch should allow a CPU to register it's own cache ops. This shall allow
> multiple CPUs with different cache handlings to be supported.
I don't really like the idea of a system of dynamic cache ops right now,
because as discussed by Mike, we're
Hi Mike,
On Sun, Nov 6, 2011 at 5:09 PM, Mike Frysinger wrote:
> On Sunday 06 November 2011 14:29:47 Simon Glass wrote:
>> On this particular patch, I feel it should be more explicit about L1
>> cache, which is what I think it deals with. We may want to support L2
>> also through a similar API. A
On Sunday 06 November 2011 14:29:47 Simon Glass wrote:
> On this particular patch, I feel it should be more explicit about L1
> cache, which is what I think it deals with. We may want to support L2
> also through a similar API. And a CONFIG option is a good idea.
the point of flushing caches is to
On Sunday 06 November 2011 13:07:29 Marek Vasut wrote:
> > On Sunday 06 November 2011 07:39:56 Marek Vasut wrote:
> > > > On Saturday 05 November 2011 21:16:23 Marek Vasut wrote:
> > > > > This patch should allow a CPU to register it's own cache ops. This
> > > > > shall allow multiple CPUs with di
Hi,
On Sun, Nov 6, 2011 at 10:07 AM, Marek Vasut wrote:
>> On Sunday 06 November 2011 07:39:56 Marek Vasut wrote:
>> > > On Saturday 05 November 2011 21:16:23 Marek Vasut wrote:
>> > > > This patch should allow a CPU to register it's own cache ops. This
>> > > > shall allow multiple CPUs with dif
> On Sunday 06 November 2011 07:39:56 Marek Vasut wrote:
> > > On Saturday 05 November 2011 21:16:23 Marek Vasut wrote:
> > > > This patch should allow a CPU to register it's own cache ops. This
> > > > shall allow multiple CPUs with different cache handlings to be
> > > > supported.
> > >
> > > s
On Sunday 06 November 2011 07:39:56 Marek Vasut wrote:
> > On Saturday 05 November 2011 21:16:23 Marek Vasut wrote:
> > > This patch should allow a CPU to register it's own cache ops. This
> > > shall allow multiple CPUs with different cache handlings to be
> > > supported.
> >
> > sorry, what's t
> On Saturday 05 November 2011 21:16:23 Marek Vasut wrote:
> > This patch should allow a CPU to register it's own cache ops. This shall
> > allow multiple CPUs with different cache handlings to be supported.
>
> sorry, what's the point ? this would make sense if you wanted to build one
> u- boot
On Saturday 05 November 2011 21:16:23 Marek Vasut wrote:
> This patch should allow a CPU to register it's own cache ops. This shall
> allow multiple CPUs with different cache handlings to be supported.
sorry, what's the point ? this would make sense if you wanted to build one u-
boot image to run
This patch should allow a CPU to register it's own cache ops. This shall allow
multiple CPUs with different cache handlings to be supported.
Signed-off-by: Marek Vasut
Cc: Albert ARIBAUD
Cc: Wolfgang Denk
---
arch/arm/include/asm/cache.h | 22
arch/arm/include/asm/global_data.
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