Anup Patel
> ; Bin Meng ; Joe
> Hershberger ; Loic Pallardy
> ; Lukas Auer ;
> Marek Behún ; Marek Vasut
> ; Patrick Delaunay ;
> Peng Fan ; Philippe Reynes
> ; Simon Glass ;
> Simon Goldschmidt ; Stefano Babic
> ; Thierry Reding ; Tom Rini
> ; l...@nuviainc.com; Schaefer, Daniel
om>;
Stefano Babic
<mailto:sba...@denx.de>; Thierry Reding
<mailto:tred...@nvidia.com>; Tom Rini
<mailto:tr...@konsulko.com>;
l...@nuviainc.com<mailto:l...@nuviainc.com>; Schaefer, Daniel (DualStudy)
<mailto:daniel.schae...@hpe.com>
Subject: Re: [RFC PAT
On Thu, 5 Mar 2020 at 04:28, Schaefer, Daniel (DualStudy)
wrote:
>
> Hi,
>
> I have started to implement the corresponding changes in EDK2:
> https://github.com/changab/edk2-staging-riscv/compare/5f63e9249751ccb9302514455b9a1a7038f34547...RISC-V-DT-fixup
> What happens is: The DTB is embedded in
t; Peng Fan ; Philippe Reynes
> > ; Simon Glass ;
> > Simon Goldschmidt ; Stefano Babic
> > ; Thierry Reding ; Tom Rini
> > ; l...@nuviainc.com; Schaefer, Daniel (DualStudy)
> >
> > Subject: Re: [RFC PATCH 0/1] Add boot hartid to a Device tree
> >
&g
er, Daniel (DualStudy)
>
> Subject: Re: [RFC PATCH 0/1] Add boot hartid to a Device tree
>
> On Tue, 25 Feb 2020 at 09:28, Chang, Abner (HPS SW/FW Technologist)
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: Atish Pa
On Tue, 25 Feb 2020 at 09:28, Chang, Abner (HPS SW/FW Technologist)
wrote:
>
>
>
> > -Original Message-
> > From: Atish Patra [mailto:ati...@atishpatra.org]
> >
> > On Mon, Feb 24, 2020 at 3:35 PM Ard Biesheuvel
> > wrote:
> > >
> > > On Tue, 25 Feb 2020 at 00:22, Heinrich Schuchardt
fer, Daniel (DualStudy)
>
> Subject: Re: [RFC PATCH 0/1] Add boot hartid to a Device tree
>
> On Mon, Feb 24, 2020 at 3:35 PM Ard Biesheuvel
> wrote:
> >
> > On Tue, 25 Feb 2020 at 00:22, Heinrich Schuchardt
> wrote:
> > >
> > > On 2/24/20 11:1
On Mon, Feb 24, 2020 at 3:35 PM Ard Biesheuvel
wrote:
>
> On Tue, 25 Feb 2020 at 00:22, Heinrich Schuchardt wrote:
> >
> > On 2/24/20 11:19 PM, Atish Patra wrote:
> > > The RISC-V booting protocol requires the hart id to be present in "a0"
> > > register. This is not a problem for bootm/booti com
On Tue, 25 Feb 2020 at 00:22, Heinrich Schuchardt wrote:
>
> On 2/24/20 11:19 PM, Atish Patra wrote:
> > The RISC-V booting protocol requires the hart id to be present in "a0"
> > register. This is not a problem for bootm/booti commands as they directly
> > jump to Linux kernel. However, bootefi j
On 2/24/20 11:19 PM, Atish Patra wrote:
The RISC-V booting protocol requires the hart id to be present in "a0"
register. This is not a problem for bootm/booti commands as they directly
jump to Linux kernel. However, bootefi jumps to a EFI boot stub code in
Linux kernel which acts a loader and jum
The RISC-V booting protocol requires the hart id to be present in "a0"
register. This is not a problem for bootm/booti commands as they directly
jump to Linux kernel. However, bootefi jumps to a EFI boot stub code in
Linux kernel which acts a loader and jumps to real Linux after terminating
the boo
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