[PATCHv2 5/5] board: ge: bx50v3: cleanup phy config

> The current PHY rework does the following things: > 1. Configure 125MHz clock > 2. Setup the TX clock delay (RX is enabled by default), > 3. Setup reserved bits to avoid voltage peak > The clock delays are nowadays already configured by the > PHY driver (in ar803x_delay_config). The code for that

[PATCHv2 5/5] board: ge: bx50v3: cleanup phy config

The current PHY rework does the following things: 1. Configure 125MHz clock 2. Setup the TX clock delay (RX is enabled by default), 3. Setup reserved bits to avoid voltage peak The clock delays are nowadays already configured by the PHY driver (in ar803x_delay_config). The code for that can simpl