> In order to be able to run the I2C bus at 400Khz, the chip errata[1]
> recommends that the peripheral clock runs out of the 24MHz oscillator.
> Systems running I2C from OP-TEE before Linux executes - for example to
> access a Secure Element [2] providing the cryptographic support - expect
> this
On Fri, Oct 23, 2020 at 4:18 PM Jorge Ramirez-Ortiz wrote:
>
> In order to be able to run the I2C bus at 400Khz, the chip errata[1]
> recommends that the peripheral clock runs out of the 24MHz oscillator.
>
> Systems running I2C from OP-TEE before Linux executes - for example to
> access a Secure
In order to be able to run the I2C bus at 400Khz, the chip errata[1]
recommends that the peripheral clock runs out of the 24MHz oscillator.
Systems running I2C from OP-TEE before Linux executes - for example to
access a Secure Element [2] providing the cryptographic support - expect
this clock to
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