On Wed, Aug 17, 2022 at 03:07:14PM +0200, Philip Oberfichtner wrote:
> From: Marek Vasut
>
> Enable d-cache early in SPL right after DRAM is started up.
> This reduces U-Boot proper load time by 650ms when loaded
> from SPI NOR.
>
> Signed-off-by: Marek Vasut
> Signed-off-by: Philip Oberfichtn
From: Marek Vasut
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v6:
- Once more improve the dcache_disable() comment
Cha
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