On Thu, Apr 3, 2025 at 4:39 AM Miquel Raynal wrote:
> Changes in v6:
> - Another rebase on next.
> - Fixed the clock 24M oscillator clock name due to recent changes.
> - Fixed a subject prefix.
> - Collected tags.
> - Fixed the CI by adding two missing configuration items to secondary
> sandbox
In order to display a boot picture or an error message, the i.MX8MP
display pipeline must be enabled. The SoC has support for various
interfaces (LVDS, HDMI, DSI). The one supported in this series is the
standard 4-lane LVDS output. The minimal setup is thus composed of:
* An LCD InterFace (LCDIF)
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