On 7/6/21 10:45 AM, Tom Rini wrote:
On Tue, Jul 06, 2021 at 10:18:44AM -0500, Alex G. wrote:
On 5/31/21 12:43 PM, Alexandru Gagniuc wrote:
The purpose of this series is to allow booting an OP-TEE image from
SPL, by corectly configuring the TrustZone (TZC) memory regions.
Any chance we could
On Tue, Jul 06, 2021 at 10:18:44AM -0500, Alex G. wrote:
> On 5/31/21 12:43 PM, Alexandru Gagniuc wrote:
> > The purpose of this series is to allow booting an OP-TEE image from
> > SPL, by corectly configuring the TrustZone (TZC) memory regions.
>
> Any chance we could have this hit the merge win
On 5/31/21 12:43 PM, Alexandru Gagniuc wrote:
The purpose of this series is to allow booting an OP-TEE image from
SPL, by corectly configuring the TrustZone (TZC) memory regions.
Any chance we could have this hit the merge window?
Alex
The purpose of this series is to allow booting an OP-TEE image from
SPL, by corectly configuring the TrustZone (TZC) memory regions.
Although TZC400 is a generic silicon logic that could apply to other
mach- families, support is currently restricted to stm32mp. I have
neither a feasible way nor in
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