On Mon, Jul 31, 2023 at 9:56 PM Simon Glass wrote:
>
> From: Bin Meng
>
> On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
> needs to program MTRRs too. With current testing logic of mtrr
> commit in init_cache_f_r(), the mtrr commit is skipped which won't
> work as the queued m
Hi Simon,
On Tue, Aug 1, 2023 at 12:13 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Mon, 31 Jul 2023 at 08:58, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Mon, Jul 31, 2023 at 9:56 PM Simon Glass wrote:
> > >
> > > From: Bin Meng
> > >
> > > On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-
Hi Bin,
On Mon, 31 Jul 2023 at 08:58, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jul 31, 2023 at 9:56 PM Simon Glass wrote:
> >
> > From: Bin Meng
> >
> > On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
> > needs to program MTRRs too. With current testing logic of mtrr
> > com
Hi Simon,
On Mon, Jul 31, 2023 at 9:56 PM Simon Glass wrote:
>
> From: Bin Meng
>
> On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
> needs to program MTRRs too. With current testing logic of mtrr
> commit in init_cache_f_r(), the mtrr commit is skipped which won't
> work as t
From: Bin Meng
On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
needs to program MTRRs too. With current testing logic of mtrr
commit in init_cache_f_r(), the mtrr commit is skipped which won't
work as the queued mtrr requests include setup for DRAM regions.
Change the logic to
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